Projects

At the Center for Project-Based Learning (PBL), we offer hands-on projects that allow students to apply their knowledge, develop new skills, and collaborate on real-world challenges. Below, you’ll find our current projects open for applications. Whether you’re looking to innovate, prototype, or conduct cutting-edge research, this is your chance to get involved!

Interested in past projects? Click here to explore previous student work and get inspired.

Pushing Ultrasound to the Limit: 100 Gbit Ethernet Interface for Imaging at the Edge of Physics

Next-generation ultrasound (US) imaging demands exceptionally high data throughput, exceeding 90 Gbps for ultrafast applications. This project harnesses datacenter networking techniques—100G Ethernet, RDMA, and HPC-grade storage—to enable real-time streaming of raw US data at minimal latency. By integrating advanced optical interfaces and bypassing conventional CPU-intensive workflows, this project aims to achieve sustained multi-gigabit performance, paving the way for cutting-edge imaging analytics and machine learning within modern datacenter environments

Keywords

Datacenter networking, 100G Ethernet, HPC, RDMA, Infiniband, high-speed streaming, ultrasound, Linux kernel programming

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Semester Project , Master Thesis , FPGA (PBL) , Software (PBL) , Firmware (PBL) , Biomedical (PBL)

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Published since: 2025-10-09 , Earliest start: 2025-07-01

Applications limited to Department of Computer Science , Department of Information Technology and Electrical Engineering

Organization Center for Project-Based Learning D-ITET

Hosts Villani Federico

Topics Engineering and Technology

Design of a Quadrature Sampling Detector for Low Power Wireless On-Body Communication

Wearable, wirelessly connected sensors are pushing the limits of energy efficiency and miniaturization. Traditional RF front-ends remain one of the most power-hungry blocks, challenging the realization of truly low-power and unobtrusive body area networks. In this context, the Tayloe mixer (also known as a quadrature sampling detector) emerges as a highly efficient candidate for body-coupled communication, providing low-power frequency translation with minimal analog complexity. Its passive switching principle makes it especially attractive for ultra-low power receiver designs where linearity and selectivity are critical yet power budgets are constrained. Applied to Human Body Communication (HBC), the Tayloe mixer enables efficient down conversion of signals coupled through the body into baseband with reduced hardware overhead compared to conventional Gilbert-cell mixers, especially when it comes to off-the-shelf implementation. This approach paves the way for robust, energy-efficient wireless personal body area networks (WBANs), where physiological sensors can communicate securely and reliably with a central gateway device, such as a smartwatch, while minimizing battery consumption.

Keywords

Hardware design, Firmware design, analog circuit design, digital circuit design, signal processing, field evaluation

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Energy Harvesting (PBL) , Semester Project , Bachelor Thesis , Microcontroller (PBL) , PCB Design (PBL) , Biomedical (PBL) , Wearables (PBL)

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Published since: 2025-09-30

Applications limited to Department of Information Technology and Electrical Engineering

Organization Center for Project-Based Learning D-ITET

Hosts Schulthess Lukas

Topics Engineering and Technology

Cross-Modal Distillation from DINOv3 for Self-Supervised Event-Based Representation Learning

Event cameras provide asynchronous, high-temporal resolution measurements with low latency, high dynamic range, and robustness to motion blur, making them promising for robotics and automotive applications. However, the lack of large annotated datasets limits supervised training. In contrast, RGB vision models such as DINOv3 [6] have been pretrained on massive image corpora and learn highly transferable features, Fig 1. This project aims to bridge the gap by distilling DINOv3 features from RGB inputs into a self-supervised event-based encoder, enabling the learning of rich event representations without labels.

Keywords

Computer Vision, Self-Supervised Representation, Multi-Modal Architecture, Knowledge Distillation

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Semester Project , Master Thesis , ETH Zurich (ETHZ)

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Published since: 2025-09-30 , Earliest start: 2025-09-30 , Latest end: 2026-06-30

Organization Center for Project-Based Learning D-ITET

Hosts Bonazzi Pietro

Topics Information, Computing and Communication Sciences , Engineering and Technology

Design of a Quadrature Amplitude Mixer for Low Power Wireless On-Body Communication

Wearable and body-attached sensors increasingly rely on efficient physical layer techniques to balance data rate, robustness, and power consumption. While many HBC (Human Body Communication) systems to date focus on simple modulation schemes, higher spectral efficiency becomes essential as the number of sensors and transmitted features grows. Quadrature Amplitude Modulation (QAM) offers a compact constellation design enabling higher data throughput within limited bandwidths, making it an attractive option for body-coupled communication channels. The availability of off-the-shelf QAM modulators further accelerates prototyping and evaluation, reducing the barrier for system-level demonstrations. In the context of Human Body Communication, integrating such modulators provides a practical path toward assessing trade-offs between data rate, energy efficiency, and channel robustness in real-world conditions. Leveraging ready-made hardware reduces the design overhead of RF front ends, allowing the focus to shift toward system optimization, channel characterization, and advanced signal processing for body area networks (WBANs).

Keywords

Hardware design, Firmware design, analog circuit design, digital circuit design, signal processing, field evaluation

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Semester Project , Bachelor Thesis , ETH Zurich (ETHZ)

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Published since: 2025-09-30

Applications limited to Department of Information Technology and Electrical Engineering

Organization Center for Project-Based Learning D-ITET

Hosts Schulthess Lukas

Topics Engineering and Technology

Non-invasive remote tracking and vita sign monitoring with low-power and miniaturized FMCW radars

In many applications, from robotics to home and industry automation, localizing objects and people is an essential feature. Outdoor localization is generally performed using GNSS, GPS, which does not work in indoor scenarios. In this applications, systems like BLE and UWB tag-anchor system are commonly implemented. However, these systems involve the necessity of carrying a battery supplied tag together with the tracked object. This limits the applicability to human and/or animals, that are not happy to wear 24/7 electronic devices, or it can increase the system cost for industrial products.

Keywords

Radars, FMCW, Low Power, Sensors, Digital Signal Processing

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Semester Project , Master Thesis

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Published since: 2025-09-01 , Earliest start: 2025-09-07

Applications limited to ETH Zurich

Organization Center for Project-Based Learning D-ITET

Hosts Polonelli Tommaso

Topics Engineering and Technology

Ultrasound measurement of microbubble stiffness for in situ detection of protease activity in clinical settings

A new kind of gas-filled microbubble enables the detection of protease activity by using ultrasound imaging techniques. The main goal of this work is to develop a setup that can reliably be used to measure the stiffness of microbubbles, first in a microbubble solution, and then in a model built to simulate the vasculature of a mouse.

Keywords

Ultrasound imaging techniques, microbubbles, signal processing, modeling, analog and digital filter design, circuit design

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Semester Project , Master Thesis

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Published since: 2025-08-27

Applications limited to Department of Information Technology and Electrical Engineering

Organization Center for Project-Based Learning D-ITET

Hosts Villani Federico

Topics Engineering and Technology

Development Of An FPGA-Based Optoacoustic Image Reconstruction Platform for Clinical Applications

Optoacoustic (OA) imaging is a hybrid imaging method that enables deep tissue imaging with a high spatial resolution by combining optical illumination with ultrasound detection. The goal of this student project is to devise a parallel HW accelerator and explore different HLS code optimizations to achieve the best performance for OA image reconstruction on an FPGA in real-time.

Keywords

Digital design (HDL), biomedical imaging, image reconstruction, hardware acceleration, Linux

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Semester Project , Bachelor Thesis , Master Thesis

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Optoacoustic (OA) imaging is a hybrid imaging method that enables deep tissue imaging with a high spatial resolution by combining optical illumination with ultrasound detection. OA imaging is based on the OA effect, where the ultrasound (US) waves are generated when incident laser energy is absorbed by different molecules leading to local temperature rise. The acoustic pressure propagating from the molecules is acquired using various ultrasonic transducers. Finally, with the help of different reconstruction algorithms, the initial pressure distribution from the acquired pressure waves is recovered. In practice, most of these reconstructions are carried out on workstations making OA imaging systems bulkier and more complex. Hence realizing OA image reconstruction on FPGAs will enhance the adaptability of OA imaging systems with point-of-care (bedside) applications due to their small size and high computation power. With our MATLAB and C++-based delay and sum-based image reconstruction algorithms, we can successfully reconstruct OA images from pre-acquired raw OA signals. We are currently working on the implementation of FPGA based delay and sum-based image reconstruction algorithm with pre-acquired raw OA signals using high-level synthesis (HLS). Your task includes devising a parallel HW accelerator and exploring different HLS code optimizations to achieve the best performance. The algorithms will be tested on an existing FZ3 Card, a powerful deep-learning accelerator card based on Xilinx Zynq UltraScale+ ZU3EG MPSoC. The overall goal will be to streamline the raw OA data and perform accelerated image reconstruction on the FPGA in real-time. **Prerequisites** - FPGA Programming (VLSI 1 course or similar) - C++ Programming - MATLAB or Python for evaluation of results - Image processing algorithms (beneficial) - Knowledge of Linux (beneficial) **Type of work** - 10% Literature study - 20% Algorithm evaluation - 30% Firmware design and optimization - 30% Measurements and validation - 10% Documentation

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Published since: 2025-08-27

Applications limited to ETH Zurich , Department of Information Technology and Electrical Engineering

Organization Center for Project-Based Learning D-ITET

Hosts Villani Federico

Topics Engineering and Technology

A FPGA-based data streaming system that enables real-time monitoring of cell culture and neuroactivities

This project aims to create a FPGA-based interface capable of streaming live data from a ETH-developed CMOS biosensor and monitor neuroactivity and cell cultures in real time

Keywords

Sensing, ADC, FPGA, High-performance computing, biosensing

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Semester Project , Master Thesis

Description

**Introduction** The physiology of living cells and tissues is of large interest to pharmaceutical industry for new drug development, as important information such as the drug efficacy and toxicity can be readily assessed in vitro. As such, the development of CMOS biosensors for cell monitoring and manipulation is essential. Many existing CMOS cellular sensors, however, suffer from one major limitation: of the many pixels on the sensing platform, only a handful of channels can be read concurrently, limiting our understanding of the cell culture as a whole. A newly developed platform achieves 20k concurrent channel reading, at 20kHz frame rate and 10 bit resolution. However, the vast output data stream that needs to be accessed and monitored calls for a high-speed FPGA/GPU based system with a compact, and incubator-compatible hardware design. **Hardware design** Central to this project is the utilization of a powerful, state of the art Xilinx FPGA. The choice of the FPGA is primarily limited by the choice of interface and by the power consumption due to the lack of active dissipation. Furthermore, depending on the FPGA choice and the student’s interest, the scope of the thesis / project may be either a full custom hardware built upon the FPGA, or a simpler board with mounted system-on-module. **Prerequisites** - Familiarity with FPGA programming (VLSI 1 or similar) - Programming experience in Python and C++ - PCB Design (Helpful but not required) **Possible Project Phases** 1. Proof-of-concept FPGA system: - Reads data from some of the ADC outputs (even just 1 or 2) into the FPGA - Streams dummy data at a speed near to 10 Gbit to a storage device - Streams the ADC output to the PC, and visualizes a selectable subset of data 2. Hardware design: - Developed based on the proof-of-concept system, the hardware system reads from all ADC channels and stream the entire data to a storage device. 3. Hardware design validation: - The hardware design is able to stream at least some ADC outputs to the PC 4. Data compression algorithm design: - The FPGA implements an algorithm that leverages large on-FPGA memory to explore possibilities for data compression

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Published since: 2025-08-27

Applications limited to Department of Information Technology and Electrical Engineering

Organization Center for Project-Based Learning D-ITET

Hosts Villani Federico

Topics Engineering and Technology